TN80C188XL20

TN80C188XL20 INTEL Y Low Power, Fully Static Versions of 80C186/80C188 Y Operation Modes: A Enhanced Mode A DRAM Refresh Control Unit A Power-Save Mode A Direct Interface to 80C187 (80C186XL Only) A Compatible Mode A NMOS 80186/80188 Pin-for-Pin Replacement for Non-Numerics Applications Y Integrated Feature Set A Static, Modular CPU A Clock Generator A 2 Independent DMA Channels A Programmable Interrupt Controller A 3 Programmable 16-Bit Timers A Dynamic RAM Refresh Control Unit A Programmable Memory and Peripheral Chip Select Logic A Programmable Wait State Generator A Local Bus Controller A Power-Save Mode A System-Level Testing Support (High Impedance Test Mode) Y Completely Object Code Compatible with Existing 8086/8088 Software and Has 10 Additional Instructions over 8086/8088 Y Speed Versions Available A 25 MHz (80C186XL25/80C188XL25) A 20 MHz (80C186XL20/80C188XL20) A 12 MHz (80C186XL12/80C188XL12) Y Direct Addressing Capability to 1 MByte Memory and 64 Kbyte I/O Y Available in 68-Pin: A Plastic Leaded Chip Carrier (PLCC) A Ceramic Pin Grid Array (PGA) A Ceramic Leadless Chip Carrier (JEDEC A Package) Y Available in 80-Pin: A Quad Flat Pack (EIAJ) A Shrink Quad Flat Pack (SGFP) Y Available in Extended Temp